This course, which is the first one of a “series”, is for anyone passionate in learning how a hardware component can be adapted at runtime to better respond to users/environment needs.
This adaptation can be provided by the designers, or it can be an embedded characteristic of the system itself.
Introduction to FPGA systems
This series of courses introduces students to the concept of Reconfigurable FPGA-based Systems, by discussing their overall architecture and companion design flows.
The goal is to present to the students the methodological approaches for the design of such systems, showing also real industrial tools, examples and common practices.
See the other MOOCs of the series.
If you are a POLIMI student you have to log in using your Person Code.
This is the only way to prove your participation in this course for official recognition.
Nowadays the complexity of computing systems is skyrocketing. Programmers have to deal with extremely powerful computing systems that take time and considerable skills to be instructed to perform at their best.
It is clear that it is not feasible to rely on human intervention to tune a system: conditions change frequently, rapidly, and unpredictably.
It would be desirable to have the system automatically adapt to the mutating environment.
This course analyzes the stated problem, embraces a radically new approach, and it introduces how software and hardware systems ca ben adjusted during execution.
By doing this, we are going to introduce the Field Programmable Gate Arrays (FPGA) technologies and how they can be (re)configured.
After this course you will be able to:
- explain the rationale behind an FPGA-based reconfigurable computing system;
- know the importance of FPGAs and of the reconfigurable computing technologies;
- compare domains to understand if they can benefit from a “reconfigurable approach”;
- describe the main components used to “define” an FPGA and how a system can be implemented on it.
Once a student completes this course, he will be ready to take more advanced FPGA courses.
This is an introductory course to FPGA, therefore within this context no specific background knowledge is requested. Anyone with moderate computer experience should be able to master the materials in this course.
A Forum section is available. The Forum is designed to allow students to exchange opinions and discuss open questions. The instructors participate in the Forum as well, as Administrators, and oversee the developing of the threads.
Quizzes and scores
The course is organized into different weeks and modules. You will find some quizzes to check your understanding. The final grade for the course will be calculated based on your performance in the quizzes.
Certificate of Accomplishment
The Certificate of Accomplishment will be released to anyone who successfully completed the course by answering correctly to at least 60% of the questions by the end of the edition.
You will be able to download the Certificate of Accomplishment directly on the website.
Once you have successfully passed the course, you can request the Certificate of Accomplishment without waiting for the end of the edition.
The Certificate of Accomplishment does not confer any academic credit, grade or degree.
For further information, see FAQ page.
Marco Domenico Santambrogio
He is an Associate professor at Politecnico di Milano and a Research Affiliate with the CSAIL at MIT.
He received his laurea (M.Sc. equivalent) degree in Computer Engineering from the Politecnico di Milano (2004), his second M. Sc. degree in Computer Science from the University of Illinois at Chicago (UIC) in 2005
and his PhD degree in Computer Engineering from the Politecnico di Milano (2008).
Dr. Santambrogio was a postdoc fellow at CSAIL, MIT, and he has also held visiting positions at the Department of Electrical Engineering and Computer Science of the Northwestern University (2006 and 2007)
and Heinz Nixdorf Institut (2006).
Marco D. Santambrogio is a senior member of the IEEE. Marco D. Santambrogio is a senior member of both the IEEE and ACM, he is member of the IEEE Computer Society (CS) and the IEEE Circuits and Systems Society (CAS).
He is or has been member of different program committees of electronic design automation conferences, among which: DAC, DATE, CODES+ISSS, FPL, RAW, EUC, IFIP VLSI Conference.
He has been with the Micro Architectures Laboratory at the Politecnico di Milano, where he founded the Dynamic Reconfigurability in Embedded System Design (DRESD) project in 2004.
In 2011, he founded the Novel, Emerging Computing System Technologies Laboratory (NECSTLab), merging together the two previously existing labs: MicroLab and VPLab,
and he is, since then, in charge of the laboratory.