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Politecnico di Milano

FPGA computing systems: Partial Dynamic Reconfiguration

The course introduces students to the concept of Reconfigurable FPGA-based Systems, by discussing their overall architecture and companion design flows. The goal is to present to the students the methodological approaches for the design of such systems, showing also real industrial tools, examples and common practices.

Introduction to FPGA systems

This series of courses introduces students to the concept of Reconfigurable FPGA-based Systems, by discussing their overall architecture and companion design flows. The goal is to present to the students the methodological approaches for the design of such systems, showing also real industrial tools, examples and common practices.

If you are a POLIMI student you have to log in using your Person Code. This is the only way to prove your participation in this course for official recognition.

Course Description

New application domains demand ever increasing adaptability and performance. In order to cope with changing user requirements, improvements in system features, changing protocol and data-coding standards, and demands for support of a variety of different user applications, many emerging applications in communication, computing and consumer electronics demand that their functionality stays flexible after the system has been manufactured. Reconfigurable Systems-on-a-Chips (SoCs) employing different microprocessor cores and different types of reconfigurable fabrics are one attractive solution for these domains. The increasing prominence of reconfigurable devices within such systems requires HW/SW co-design for SoCs to address the trade-off between software execution and reconfigurable hardware acceleration. Dynamic reconfiguration capabilities of current reconfigurable devices create an additional dimension in the temporal domain. During the design space exploration phase, overheads associated with reconfiguration and hardware/software interfacing need to be evaluated carefully in order to harvest the full potential of dynamic reconfiguration.

The course will introduce the student with the concept of reconfigurability in FPGAs, presenting the available mechanisms and technologies at the device level and the tools and design methodologies required to design reconfigurable FPGA-based systems. The course will present the different aspects of the design of FPGA-based reconfigurable systems, focusing in particular on dynamically self-reconfigurable systems. The design methodologies and tools required to design a dynamically-reconfigurable system will be introduced and described, together with the problems that need to be considered.

After this course you will be able to:

  • describe why reconfigurable computing can be seen as an extension of the HW/SW codesign;
  • illustrate the reconfigurable computing “taxonomy”;
  • summarize the main concepts/terms introduced with respect to a reconfigurable computing scenario;
  • understand how a design flow to design and implement a reconfigurable system is working.

Once a student completes this course, he will be ready to take more advanced FPGA courses.

Prerequisites

This course follows the previous one "FPGA computing systems: A Bird’s Eye View on Reconfigurable Computing". Within this context no specific background knowledge is requested. Anyone with moderate computer experience should be able to master the materials in this course.

Discussion forum

A Forum section is available. The Forum is designed to allow students to exchange opinions and discuss open questions. The instructors participate in the Forum as well, as Administrators, and oversee the developing of the threads.

Quizzes and scores

The course is organized into different weeks and modules. You will find some quizzes to check your understanding. The final grade for the course will be calculated based on your performance in the quizzes.

Certificate of Accomplishment

The Certificate of Accomplishment will be released to anyone who successfully completed the course by answering correctly to at least 60% of the questions by the end of the edition. You will be able to download the Certificate of Accomplishment directly on the website.

Once you have successfully passed the course, you can request the Certificate of Accomplishment without waiting for the end of the edition.

The Certificate of Accomplishment does not confer any academic credit, grade or degree.

FAQ

For further information, see FAQ page.

Course faculty

Marco Santambrogio

Marco Domenico Santambrogio

He is an Associate professor at Politecnico di Milano and a Research Affiliate with the CSAIL at MIT. He received his laurea (M.Sc. equivalent) degree in Computer Engineering from the Politecnico di Milano (2004), his second M. Sc. degree in Computer Science from the University of Illinois at Chicago (UIC) in 2005 and his PhD degree in Computer Engineering from the Politecnico di Milano (2008). Dr. Santambrogio was a postdoc fellow at CSAIL, MIT, and he has also held visiting positions at the Department of Electrical Engineering and Computer Science of the Northwestern University (2006 and 2007) and Heinz Nixdorf Institut (2006).

Marco D. Santambrogio is a senior member of the IEEE. Marco D. Santambrogio is a senior member of both the IEEE and ACM, he is member of the IEEE Computer Society (CS) and the IEEE Circuits and Systems Society (CAS). He is or has been member of different program committees of electronic design automation conferences, among which: DAC, DATE, CODES+ISSS, FPL, RAW, EUC, IFIP VLSI Conference.

He has been with the Micro Architectures Laboratory at the Politecnico di Milano, where he founded the Dynamic Reconfigurability in Embedded System Design (DRESD) project in 2004. In 2011, he founded the Novel, Emerging Computing System Technologies Laboratory (NECSTLab), merging together the two previously existing labs: MicroLab and VPLab, and he is, since then, in charge of the laboratory.

  1. Course Number

    FPGA102
  2. Classes Start

    May 27, 2019
  3. Classes End

    May 10, 2020
  4. Estimated Effort

    2-3 hours/week
  5. Language

    English
  6. MOOCs For Master of science
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